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TriMedia Selects Mentor Graphics for Co-Verification Support of 32-bit Media Processor
WILSONVILLE, Ore.--(BUSINESS WIRE)--Sept. 4, 2001--Mentor Graphics
Corporation (Nasdaq:MENT), the leading supplier of co-verification
solutions, today announced the availability of a co-verification
Processor Support Package (PSP) for the TriMedia(TM) 32-bit (TM32)
media processor core.
The PSP, integrated with Mentor Graphics® Seamless®
Co-Verification Environment(TM), will accelerate design schedules by
enabling designers to validate hardware and software interfaces early
in the design process within a virtual prototype, reducing
time-consuming design iterations late in the design cycle. The PSP
will enable developers working with TriMedia's media processor
intellectual property (IP) to rapidly bring to market a variety of
advanced digital consumer applications, including set-top boxes,
personal video recorders, digital televisions and videophones.
``Co-verification is a critical part of maintaining our edge in the
highly-competitive advanced digital consumer appliance market and of
further proliferating media processor IP,'' said Randy Smith, vice
president of marketing and sales, TriMedia. ``By working with Mentor
Graphics, our advanced media processor licensees will be able to
utilize standardized modeling tools for co-verification. As the
digital consumer market continues to expand, companies designing next
generation communications products can increase their competitive
advantage by deploying our media processing technology instead of
lower-performing general purpose DSP technology. Co-verification lets
them objectively evaluate the various options, which we're confident
will result in increased selection of our technology.''
The processors based on the TriMedia SoC platform are designed to
support a wide range of digital appliances requiring flexible
performance, streaming media, and communications processing along with
the ability to support applications such as Internet browsing and
video e-mail. Based on breakthroughs in Very Long Instruction Word
(VLIW) technology, processors using TriMedia solutions achieve
exceptional performance by executing more than five operations per
clock cycle. The TriMedia Software Development Environment supports
application development, performance tuning and optimization entirely
in C/C++ programming languages.
``Mentor Graphics is always first to market with co-verification
support offerings for every major embedded processor architecture,''
said Serge Leef, vice president and general manager, System-On-Chip
Verification Business Division, Mentor Graphics. ``TriMedia's 32-bit
media processor is making giant leaps in the consumer appliance market
and is capturing a significant share of the media processing market
especially in applications such as set-top boxes and digital
television. Recognizing an increase in developer need, Mentor Graphics
provides a PSP that will be a critical factor in shortening design
schedules based on the TriMedia platform.''
The PSP is based on TriMedia's existing instruction set
simulators, and interfaced to the Mentor Graphics Seamless CVE(TM)
through an adaptor layer. The initial agreement model includes the
TM32 PSP, with additional PSPs to be added as they become available
from TriMedia.
The PSPs supported by Mentor Graphics have been verified against
TriMedia's proprietary test suites to ensure accuracy. The TM32 PSPs
also support TriMedia's proprietary tools suite including the tmdbg, a
source level GUI debugger for TriMedia processors. The PSPs interface
with popular logic simulation platforms, including Model Technology's
ModelSim® simulation product, and are compatible with the extensive
library of PSPs already available from Mentor Graphics for use in
multi-processor systems.
Availability and Pricing
For information on pricing and availability of the TM32 PSP visit
the TriMedia web site at www.trimedia.com.
About Seamless
Combining the best in embedded software development tools with
logic simulation, the Mentor Graphics Seamless co-verification
environment delivers high performance co-verification months before a
hardware prototype can be built. The Seamless environment enables
software and hardware development to be carried out in parallel
removing the software from the critical path, and reducing the risk of
hardware prototype iterations resulting from integration errors.
User-controlled optimizations boost performance by isolating the logic
simulator from software-intensive operations such as block memory
transfers and algorithmic routines.
About Mentor Graphics Corporation
Mentor Graphics Corporation (Nasdaq:MENT) is a world leader in
electronic hardware and software design solutions, providing products,
consulting services and award-winning support for the world's most
successful electronics and semiconductor companies. Established in
1981, the company reported revenues over the last 12 months of more
than $600 million and employs approximately 2,975 people worldwide.
Corporate headquarters are located at 8005 S.W. Boeckman Road,
Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are
located at 1001 Ridder Park Drive, San Jose, California 95131-2314.
World Wide Web site: www.mentor.com.
Mentor Graphics, Seamless and ModelSim are registered trademarks
of Mentor Graphics Corporation. Co-verification environment and CVE
are trademarks of Mentor Graphics Corporation. TriMedia Technologies
Inc., and TriMedia are trademarks of TriMedia Technologies, Inc. All
other company or product names are the registered trademarks or
trademarks of their respective owners.
Contact:
Mentor Graphics Corporation
Wendy Slocum, 503/685-1145
wendy_slocum@mentor.com
or
Benjamin Group/BSMG Worldwide
Victor Domine, 408/559-6090, ext. 327
vdomine@bsmg.com
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